74HC573D SMD

General Description
The MM74HC573 high speed octal D-type latches utilize
advanced silicon-gate P-well CMOS technology. They possess the high noise immunity and low power consumption
of standard CMOS integrated circuits, as well as the ability
to drive 15 LS-TTL loads. Due to the large output drive
capability and the 3-STATE feature, these devices are ideally suited for interfacing with bus lines in a bus organized
system.
When the LATCH ENABLE(LE) input is HIGH, the Q outputs will follow the D inputs. When the LATCH ENABLE
goes LOW, data at the D inputs will be retained at the outputs until LATCH ENABLE returns HIGH again. When a
HIGH logic level is applied to the OUTPUT CONTROL OC
input, all outputs go to a HIGH impedance state, regardless
of what signals are present at the other inputs and the state
of the storage elements.
The 74HC logic family is speed, function and pinout compatible with the standard 74LS logic family. All inputs are
protected from damage due to static discharge by internal
diode clamps to VCC and ground.

Features
? Typical propagation delay: 18 ns
? Wide operating voltage range: 2 to 6 volts
? Low input current: 1 PA maximum
? Low quiescent current: 80 PA maximum (74HC Series)
? Compatible with bus-oriented systems
? Output drive capability: 15 LS-TTL loads