CD4060 DIP- ic

CD4060 consists of an oscillator section and 14 ripple-carry binary counter stages. The oscillator configuration allows design of either RC or crystal oscillator circuits. A RESET input is provided which resets the counter to the all-O’s state and disables the oscillator. A high level on the RESET line accomplishes the reset function. All counter stages are master-slave flip-flops. The state of the counter is advanced one step in binary order on the negative transition. All inputs and outputs are fully buffered. Schmitt trigger action on the input-pulse line permits unlimited input-pulse rise and fall times.

The CD4060-series types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

Features:-

• 12 MHz clock rate at 15 V
• Common reset
• Fully static operation
• Buffered inputs and outputs
• Schmitt trigger input-pulse line
• 100% tested for quiescent current at 20 V
• Standardized, symmetrical output characteristics
• 5-V, 10-V, and 15-V parametric ratings
• Meets all requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ?B? Series CMOS Devices?
• Oscillator Features:
  • All active components on chip
  • RC or crystal oscillator configuration
  • RC oscillator frequency of 690 kHz min. at 15 V
• Applications
  • Control counters
  • Timers
  • Frequency dividers
  • Time-delay circuits

Specifications:-