21 in stock
Features
? High Voltage Type (20V Rating)
? 2 TTL Load Output Drive Capability
? 3 State Outputs
? Common Output Disable Control
? Inhibit Control
? 100% Tested for Quiescent Current at 20V
? 5V, 10V and 15V Parametric Ratings
? Maximum Input Current of 1?A at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC
? Noise Margin (Over Full Package/Temperature Range)
– 1V at VDD = 5V
– 2V at VDD = 10V
– 2.5V at VDD = 15V
? Meets All Requirements of JEDEC Tentative Standard
No. 13B, ?Standard Specifications for Description of
?B? Series CMOS Devices?
Applications
? 3 State Hex Inverter for Interfacing ICs with Data
Buses
? COS/MOS to TTL Hex Buffer
Description
CD4502BP consists of six inverter/buffers with 3 state
outputs. A logic ?1? on the OUTPUT DISABLE input
produces a high impedance state in all six outputs. This
feature permits common busing of the outputs, thus
simplifying system design. A Logic ?1? on the INHIBIT input
switches all six outputs to logic ?0? if the OUTPUT DISABLE
input is a logic ?0?. This device is capable of driving two
standard TTL loads, which is equivalent to six times the
JEDEC ?B? series IOL standard.
The CD4502BP is supplied in these 16-lead outline packages:
Braze Seal DIP H4T
Frit Seal DIP H1F
Ceramic Flatpack H6W
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