Description
The flip-flop has independent data, preset, clear, and clock inputs and Q and Q outputs. The logic level present at the
data input is transferred to the output during the positive going transition to the clock pulse. Preset and clear are
independent of the clock and accomplished by a low level at the appropriate input.
Features
? High Speed Operation: tpd (Clock to Q or Q) = 14 ns typ (CL = 50 pF)
? High Output Current: Fanout of 10 LSTTL Loads
? Wide Operating Voltage: VCC = 2 to 6 V
? Low Input Current: 1 ?A max
? Low Quiescent Supply Current: ICC (static) = 2 ?A max (Ta = 25?C)
? Ordering Information
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All products are well packed to assure safe delivery.
All products are eligible for free delivery pan India.
Free exchange on all products till 10 days from the date of delivery